The present invention relates to a stacked IC package formed by stacking IC chips (boards) by a plurality of levels and, more specifically, to a device having functions such as the function of selecting an IC chip on a certain level in order to enable input/output to/from the IC chip on the level in the stacked IC package.
In the formation of an FPGA (field-programmable gate array), a memory and a stacked IC package, if only two or three types of ICs are necessary, their cost performance will be improved. However, if a stacked IC package is to be formed by stacking IC chips of the same type, the I/O pads of all the IC chips need to be perpendicularly connected to one another, with the result that a bus contention problem may occur. In addition, it has conventionally been necessary to connect selecting bonding wires to all the IC chips in order to enable selection of an IC chip on a certain level in the stacked IC package.
The invention has been made in order to solve the problems of the related art, and an object of the invention is to provide a device capable of reducing the number of types of necessary IC chips in the formation of a stacked IC package.
Another object of the invention is to provide a device capable of reducing the number of selecting bonding wires to be connected to the IC chips of a stacked IC package in order to enable selection of an IC chip on a certain level in the stacked IC package. In association with this object, a further object of the invention is to provide a stacked IC package having the function of counting the number of IC chips included in a stacked IC package.